Wednesday, December 17, 2008

Dielectric Resonator Oscillators (DRO)

Dielectric Resonator Oscillators (DRO) are used widely in today's electronic warfare, missile, radar and communication systems. They find use both in military and commercial applications. The DROs are characterized by low phase noise, compact size, frequency stability with temperature, ease of integration with other hybrid MIC circuitries, simple construction and the ability to withstand harsh environments.

These characteristics make DROs a natural choice both for fundamental oscillators and as the sources for oscillators that are phase-locked to reference frequencies, such as crystal oscillators.

This paper summarizes design techniques for DROs and the voltage- tuning DRO (VT-DRO), and presents measured data for them including phase noise, frequency stability and pulsing characteristics.

Design Techniques

The design technique we will discuss is for a dielectric resonator (DR) to be used as a series feedback element. Practically, a GaAs FET or a Si-bipolar transistor is chosen as the active device for the oscillator portion of the DRO circuit. The Si-bipolar transistor is generally selected for lower phase noise characteristics, while the GaAs FET is required for higher frequencies.

For example, a DRO with a DR as a series feedback element can be designed using following design procedure:

1. Select an active device that is capable of oscillation at the design frequency, and use the small signal S-parameter of the device for the design.
2. Add a feedback circuit to ensure that the stability factor of the active device with the feedback circuit is less than unity with enough margin.
3. Create an active one-port analysis that consists of the active device, the feedback circuit, the matching network and the load as shown as figure1. Optimize Za (?) with the parameters in the feedback circuit and in the matching network to ensure that Ra (?0) is less than or equal to -25 ohms and Xa (?) has the possible maximum variation near resonance in order to insure high circuit Q.

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